Portfolio

I am pursuing M.S (by Research) in the area of Hardware Security at IIT-Madras. My research focus on evaluating side-channel resistance of a processor. It involves identifying information leaking modules and mitigating the leakages based on the nature of leakages to provide security against power side-channel attacks. It covers the holistic approach of identifying hotspots, fixing, and ensuring its effectiveness against the Differential Power Analysis (DPA).

Interests

Hardware Security
Differential Power Analysis
Computer Architecture
Machine Learning
Deep Learning
Pattern Recognition

Education

M.S (by Research) in Computer Science and Engg. at Indian Institute of Technology, Madras
B.E (CSE) at Sri Krishna College of Engineering and Technology, Coimbatore

Publications

1.PARAM: A Microprocessor Hardened for Power Side-Channel Attack Resistance (HOST2020-Accepted)

The power consumption of a microprocessor is a huge channel for information leakage. While the most popular exploitation of this channel is to recover cryptographic keys from embedded devices, ... other applications such as mobile app fingerprinting, reverse engineering of firmware, and password recovery are fast growing threats. Countermeasures proposed so far are tuned to specific applications, such as crypto-implementations. They are not scalable to the large number and variety of applications that typically run on a general purpose microprocessor. We investigate the design of a microprocessor, called PARAM with increased resistance to power based side-channel attacks. To design PARAM, we start with identifying the most leaking modules in an open-source RISC V processor. We evaluate the leakage in these modules and then add suitable countermeasures. The countermeasures depend on the cause of leakage in each module and can vary from simple modifications of the HDL code ensuring secure translation by the EDA tools, to obfuscating data and address lines thus breaking correlation with the processor's power consumption. The resultant processor is instantiated on the SASEBO-GIII FPGA board and found to resist Differential Power Analysis even after one million power traces. Compared to contemporary countermeasures for power side-channel attacks, overheads in area and frequency are minimal. More >>

Projects

1.Framework for Comprehensive Side-channel Evaluation of a Microprocessor

This work proposes a framework for evaluating data-leaks on SHAKTI C-Class (a RISC-V based microprocessor) through power-consumption side-channels. The work ... provides a comprehensive analysis of various metrics and techniques that have been proposed in literature to analyze data leaks due to such side-channels. The evaluation is done using a novel framework based on a Hamming Distance metric for modeling power patterns on binary data. The work further explores the cause of such data leaks and identifies architectural designs and practices which lead to such data leakages in the context of SHAKTI C-Class processor. More >>

Tags: Power Side-channel, Microprocessor Security, Leakage Estimation

2.Bifrost: Covert Data Exfiltration from an Air-gapped Network via Smart Bulbs

Proposed an attack model to transfer the information from an air-gapped network to an outside world through smart bulbs using Bluetooth communication in a smart home... or smart office setup. Developed an end-to-end application uses the android platform to transmit the data from sender side and the receiver can be a light sensor or a webcam that monitor the bulb from distance to decode the information by varying colors or intensity of the light bulb. It uses ASCII encoding/decoding, support synchronization of data, it uses Word2Vec tool for predicting missing words in the message. Effects such as noise intrusion and the attacker distance are studied. More >>

Tags: Covert Channel, Smart Bulb Reverse Engineering, Image processing, NLP Error Correction

Muhammad Arsath K F